New full adders using multi-layer perceptron network

Document Type: Research Paper

Authors

1 Islamic Azad University Central Tehran Branch

2 Department of Electrical and Electronics, Islamic Azad University, Central Tehran Branch, , Tehran, Iran

3 Department of Electrical and Electronics, Islamic Azad University, Central Tehran Branch, Tehran, Iran

Abstract

How to reconfigure a logic gate for a variety of functions is an interesting topic. In this paper, a different method of designing logic gates are proposed. Initially, due to the training ability of the multilayer perceptron neural network, it was used to create a new type of logic and full adder gates. In this method, the perceptron network was trained and then tested. This network was 100% accurate to determine outputs based on inputs. The results of comparison showed that the multilayer perceptron network had higher velocity and less delay in most cases, and used a smaller number of neurons, which will reduce the loss of power. Meanwhile, implementation of these gates will require less space through the multi-layer perceptron network. This method is prioritized in terms of the number of neurons and the level of implementation, and the speed of the detection of output compared to the other design. It also occupies less hardware space and is less complicated.

Keywords